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| MM74C192 * MM74C193 Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter January 1991 Revised May 2002 MM74C192 * MM74C193 Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter General Description The MM74C192 and MM74C193 up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The MM74C192 is a BCD counter, while the MM74C193 is a binary counter. Counting up and counting down is performed by two count inputs, one being held high while the other is clocked. The outputs change on the positive-going transition of this clock. These counters feature preset inputs that are set when load is a logical "0" and a clear which forces all outputs to "0" when it is at a logical "1". The counters also have carry and borrow outputs so that they can be cascaded using no external circuitry. Features s High noise margin: 1V guaranteed Drive 2 LPTTL loads s Tenth power TTL compatible: s Wide supply range: 3V to 15V s Carry and borrow outputs for N-bit cascading s Asynchronous clear s High noise immunity: 0.45 VCC (typ.) Ordering Code: Order Number MM74C192N MM74C193M MM74C193N Package Number N16E M16A N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Connection Diagram Top View (c) 2002 Fairchild Semiconductor Corporation DS005901 www.fairchildsemi.com MM74C192 * MM74C193 Absolute Maximum Ratings(Note 1) Voltage at Any Pin Operating Temperature Range (TA) Storage Temperature Range (TS) Maximum VCC Voltage Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range Lead Temperature (TA) (Soldering, 10 seconds) 260C 700 mW 500 mW 3V to 15V Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. -0.3V to VCC + 0.3V -55C to +125C -65C to +150C 18V DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Output Source Current Output Source Current Output Sink Current Output Sink Current VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, IO = -10 A VCC = 10V, IO = -10 A VCC = 5V, IO = 10 A VCC = 10V, IO = 10 A VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V VCC = 4.75V VCC = 4.75V VCC = 4.75V, IO = -100 A VCC = 4.75V, IO = 360 A VCC = 5V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 10V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 5V, VIN(1) = 5V TA = 25C, VOUT = VCC VCC = 10V, VIN(1) = 10V TA = 25C, VOUT = VCC 2.4 0.4 VCC - 1.5 0.8 -1.0 0.005 -0.005 0.05 300 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V A A A V V V V Min Typ Max Units CMOS TO LPTTL INTERFACE OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) -1.75 -8 1.75 8 mA mA mA mA www.fairchildsemi.com 2 MM74C192 * MM74C193 AC Electrical Characteristics TA = 25C, CL = 50 pF, unless otherwise noted Symbol tpd tpd tpd tS tW tW tpd0 tpd1 tW fMAX tr tf CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Propagation Delay Time to Q from Count Up or Down Propagation Delay Time to Q Borrow from Count Down Propagation Delay Time to Carry from Count Up Time Prior to Load that Data Must be Present Minimum Clear Pulse Width Minimum Load Pulse Width Propagation Delay Time to Q from Load Minimum Count Pulse Width Maximum Count Frequency Count Rise and Fall Time (Note 2) Conditions Min Typ 250 100 120 50 120 50 100 30 300 120 100 40 300 120 120 35 2.5 6 4 10 15 5 5 100 Max 400 160 200 80 200 80 160 50 480 190 160 65 480 190 200 80 Units ns ns ns ns ns ns ns ns MHz s pF pF VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V (Note 3) (Note 4) Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Application Note AN-90. Cascading Packages Guaranteed Noise Margin as a Function of VCC 3 www.fairchildsemi.com MM74C192 * MM74C193 Timing Diagrams MM74C192 Note A: Clear outputs to zero. Note B: Load (preset) to binary thirteen. Note C: Count up to fourteen, fifteen, carry, zero, one and two. Note D: Count down to one, zero, borrow, fifteen, fourteen, and thirteen. MM74C193 Note A: Clear outputs to zero. Note B: Load (preset) to BCD seven. Note C: Count up to eight, nine, carry, zero, one, and two. Note D: Count down to one, zero, borrow, nine, eight, and seven. Note E: Clear overrides load, data, and count inputs. Note F: When counting up, count down input must be HIGH; when counting down, count-up input must be HIGH. www.fairchildsemi.com 4 MM74C192 * MM74C193 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 5 www.fairchildsemi.com MM74C192 * MM74C193 Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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